What is the Azure Sphere MT3620 designed for, and how is its hardware divided?
It is a microcontroller built for end-to-end IoT security: a Cortex-A7 core runs a hardened Linux-based OS for applications, two Cortex-M4 cores handle real-time I/O, and a separate security subsystem handles authentication and updates for the device's lifetime.
Most boards leave security to whoever writes the firmware. Azure Sphere builds it into the silicon and the service around it:
| Part | Role |
|---|---|
| ARM Cortex-A7 @ 500 MHz, 4 MB RAM | Runs the high-level application on the Azure Sphere OS, a small custom Linux-based OS |
| 2 × ARM Cortex-M4 @ 200 MHz, 64 KB RAM each | Real-time cores for time-critical I/O, running bare metal or an RTOS |
| Pluton security subsystem | A dedicated core that holds the device's keys, verifies boot and backs attestation |
| Wi-Fi subsystem | Dual-band 2.4/5 GHz 802.11 a/b/g/n |
| Peripherals | UART, I2C, SPI, I2S, ADC, GPIO; USB, power jack, reset button, RGB and status LEDs |
The key idea is online authentication and updates for the device's lifetime. Each chip proves its identity to Microsoft's security service using keys that never leave the hardware, and it receives signed OS and application updates from that service. That addresses the "deployed and never patched" problem that dominates real IoT compromises.
The split between A7 and M4 cores is the same split as between Embedded Linux and an RTOS: the rich OS where you need networking and features, the tiny deterministic cores where you need timing.
Go deeper:
Microsoft Learn — What is Azure Sphere? — the hardware, OS and security service, and the properties Microsoft argues a secured IoT device needs.- Wikipedia — Microsoft Pluton — the security processor design that started in Azure Sphere and the Xbox and later moved into PC CPUs.